Computational Science Technical Note CSTN-201


Developmental Directions in Parallel Accelerators,

K. A. Hawick and D. P. Playne

Archived: 2013


Parallel accelerators such as massively-cored graphi- cal processing units or many-cored co-processors such as the Xeon Phi are becoming widespread and af- fordable on many systems including blade servers and even desktops. The use of a single such accelerator is now quite common for many applications, but the use of multiple devices and hybrid combinations is still very unusual. The main barrier to greater uptake of multiple accelerators in applications is still the soft- ware ecosystem and in particular the interoperability limitations of setting up appropriate software stacks for novel accelerator combinations. We present some benchmark results for various multiple and hybrid ac- celerator combinations using some up to date modern devices and discuss feasible developmental directions for high computational performance scientific appli- cations software to use them. We compare results with equivalent benchmarks on conventional multi- cored CPUs.

Keywords: accelerator; GPU; Xeon Phi; massive core; multi core; scientific applications; software ecosystem

Full Document Text: Not yet available. PDF version.

Citation Information: BiBTeX database for CSTN Notes.

BiBTeX reference:

        author = {K. A. Hawick and D. P. Playne},
        title = {Developmental Directions in Multiple and Hybrid Parallel Accelerators},
        booktitle = {Proc. 12th Australasian Symposium on Parallel and Distributed Computing},
        year = {2014},
        volume = {152},
        number = {CSTN-201},
        series = {CRPIT},
        pages = {21-27},
        address = {Auckland, New Zealand},
        month = {20-23 January},
        publisher = {ACS},
        owner = {dpplayne},
        timestamp = {2014.02.17}

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