Computational Science Technical Note CSTN-189

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3D Lattice Monte Carlo Simulations on FPGAs

A. Gilman and A. Leist and K. A. Hawick

Archived: 2013

Abstract

Field Programmable Gate Arrays (FPGAs) offer significant performance advantages over general purpose compute architectures for certain scientific problems, including lattice-based Monte Carlo simulations of complex systems models. We report on a custom logic design for the 3D-lattice Ising model that keeps the entire system state in on-chip memory to achieve very high throughput rates. The pipelined architecture, which is implemented in Verilog, is able to process an entire row of cells per clock cycle. When processing a system of $256^3$ spins on a Xilinx Virtex-7 device, about 3000 full system sweeps can be performed per second. We discuss implementation issues and solutions that apply in similar ways to a variety of nearest neighbour, lattice-based Monte Carlo simulations, as well as the performance of the Ising model implementation on two FPGA architectures.

Keywords: FPGA-based design; simulation; complex systems; parallel computing; performance evaluation

Full Document Text: Not yet available.

Citation Information: BiBTeX database for CSTN Notes.

BiBTeX reference:

@INPROCEEDINGS{CSTN-189,
        author = {A. Gilman and A. Leist and K. A. Hawick},
        title = {3D Lattice Monte Carlo Simulations on FPGAs},
        booktitle = {Proc. 13th International Conference on Computer Design (CDES'13)},
        year = {2013},
        number = {CSTN-189},
        pages = {CDE4048},
        address = {Las Vegas, USA},
        month = {22-25 July},
        publisher = {WorldComp},
        institution = {Computer Science, Massey University, Auckland, New Zealand},
        keywords = {FPGA-based design; simulation; complex systems; parallel computing;
                performance evaluation},
        owner = {kahawick},
        timestamp = {2013.04.22}
}


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