Computational Science Technical Note CSTN-077


Benchmarking GPU Devices with N-Body Simulations

D. P. Playne, M. G. B. Johnson and K. A. Hawick

Archived February 2009


Recent developments in processing devices such as graphical processing units and multi-core systems offer opportunities to make use of parallel techniques at the chip level to obtain high performance. We discuss the difficulties in establishing suitable benchmark codes for making comparisons across these device architectures and in a way that is representative of key applications. We report on our use of classical dynamical particle collision simulation codes as benchmarks for comparing modern GPUs. We discuss our findings in terms of architectural features for parallelism as well as clock speed issues.

Keywords: benchmarking and measurements; multi-thread; multi-core; performance analysis.

Full Document Text: PDF version.

Citation Information: BiBTeX database for CSTN Notes.

BiBTeX reference:

  author = {D. P. Playne and M. G. B. Johnson and K. A. Hawick},
  title = {{Benchmarking GPU Devices with N-Body Simulations}},
  booktitle = {Proc. 2009 International Conference on Computer Design (CDES 09)
	July, Las Vegas, USA.},
  year = {2009},
  pages = {150-156},
  address = {Las Vegas, USA},
  month = {13-16 July},
  organization = {WorldComp},
  institution = {Massey University},
  timestamp = {2009.02.28}

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