Computational Science Technical Note CSTN-024


64-Bit Architectures and Compute Clusters for High Performance Simulations

K. A. Hawick, H. A. James and C. J. Scogings

Originally Archived July 2005, Revised April 2006.


Simulation of large complex systems remains one of the most demanding of high performance computer systems both in terms of raw compute performance and efficient memory management. Recent availability of 64-bit architectures has opened up the possibilities of commodity computers accessing more than the 4 GigaByte memory limit previously enforced by 32-bit addressing. We report on some performance measurements we have made on two 64-bit architectures and their consequences for some high performance simulations. We discuss performance of our codes for simulations of artificial life models; computational physics models of point particles on lattices; and with interacting clusters of particles. We have summarised pertinent features of these codes into benchmark kernels which we discuss in the context of well-known benchmark kernels of the 32-bit era. We report on how these these findings were useful in the context of designing 64-bit compute clusters for high-performance simulations.

Keywords: 64-bit architecture; large memory; compute cluster; computer simulation models.

Full Document Text: PDF version.

Citation Information: BiBTeX database for CSTN Notes.

BiBTeX reference:

  author = {K. A. Hawick and H. A. James and C. J. Scogings},
  title = {64-Bit Architectures and Compute Clusters for High Performance Simulations},
  institution = {Computer Science, Massey University},
  year = {2006},
  number = {CSTN-024},
  address = {Albany, North Shore 102-904, Auckland, New Zealand},
  month = {April},
  series = {CSTN-024},
  url = {}

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